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We would like to implement fast-time combinational logic function using MAX3000A CPLD(EPM3032A-4). For this type of application, what is the timing jitter specification of this device with 3.3V supply?
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It's unusual to give jitter specification for logic devices. I guess, you need to determine it yourself.
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Has anyone looked into timing jitter spec of MAX 3000A CPLD?

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