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Hey guys,
I'm looking to do something that should have been simple but somehow isn't.
I have a Cyclone SoC where I'm looking to get some data I've colleced from an ADC and processed to the CPU. To that end, I've instantiated an On-Chip Memory block with 2 slave ports in the Platform designer portion of the design. I connect one slave to the HPS and the other one I export and connect to my RTL module. My problem is I can't get data from the RTL to the software on the CPU. I can use the software to write and read back the OCM and that looks fine. I can also use a modified RTL to write into and read back data from the OCM from the RTL and that also works fine.
But when I write data from the RTL into the OCM and then read the OCM from the software running on the CPU, the data isn't anywhere to be found.
Is it something silly I'm missing? Is there any other simple way of doing this? The data quantity is small and the CPU isn't doing anything else anyhow, so use of a DMA isn't justified.
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Hi,
It is possible but not a good practice to read and write on the On-Chip Memory since the size is very small.
You could try the FPGA-to-HPS Bridges for Cyclone V SoC design example here with prebuilt FPGA config file ready:
https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/soc/fpga-to-hps-bridges-design-example.html?erpm_id=8179455
The examples are at the bottom of the page.
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Hi,
I apologize that I may have been confused with your question, you are attempting to write and read back data from the Ochip memory of the HPS side?
Is it possible for you to share your design, maybe I could take a look.
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Hi there,
No worries! Here's a link to my project:
https://www.dropbox.com/s/k8bgizrdf20aaf4/de0_nano_soc.tar.gz?dl=0
You can also find a version of the SW I'm using under ./sw/src
Let me know if you need any additional information.
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Hi,
Just to let you know I am still working with this issue.
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