Try to implement a i8255 design, its a part of solved the replacement of old ULA chipset for retro computers, have issue with 'event code as I understand the Quartus II only supports the synthesis subset of vhdl.

[AVale22]

VHDL event : It relates to signals and it occurs on a signal if the current value of that signal changes. In other words, an event on a signal is a change of the signal's value. So should I store the initial value, and compare them if they have change when clock (introduce clk) rise ?

Or any other ideas to solved initial code other way? they code below is the affected part, and is the MUX that handle the PA, PB and PC communication in the i8255.

entity mux_global is

port(

pa :inout std_logic_vector (7 downto 0);

pb :inout std_logic_vector (7 downto 0);

pc :inout std_logic_vector (7 downto 0);

ain :out std_logic_vector (7 downto 0);

bin :out std_logic_vector (7 downto 0);

cin :out std_logic_vector (7 downto 0);

aout :in std_logic_vector (7 downto 0);

bout :in std_logic_vector (7 downto 0);

cout :in std_logic_vector (7 downto 0);

cen :in std_logic_vector (7 downto 0);

ben :in std_logic;

aen :in std_logic);

end mux_global;

architecture mux_global of mux_global is

signal pa_sub : std_logic_vector (7 downto 0);

signal pb_sub : std_logic_vector (7 downto 0);

signal pc_sub : std_logic_vector (7 downto 0);

begin

pa_sub <= pa;

pb_sub <= pb;

pc_sub <= pc;

pa <= aout when aen='0' and aout'event;   

ain <= pa when aen='0' and pa_sub'event;   

pb <= bout when ben='0' and bout'event; 

bin <= pb when ben='0' and pb_sub'event;  

pc(0) <= cout(0) when cen(0)='0' and cout(0)'event;

pc(1) <= cout(1) when cen(1)='0' and cout(1)'event;

pc(2) <= cout(2) when cen(2)='0' and cout(2)'event;

pc(3) <= cout(3) when cen(3)='0' and cout(3)'event;

pc(4) <= cout(4) when cen(4)='0' and cout(4)'event;

pc(5) <= cout(5) when cen(5)='0' and cout(5)'event;

pc(6) <= cout(6) when cen(6)='0' and cout(6)'event;

pc(7) <= cout(7) when cen(7)='0' and cout(7)'event;

cin(0)<= pc(0) when cen(0)='0' and pc_sub(0)'event;

cin(1)<= pc(1) when cen(1)='0' and pc_sub(1)'event;

cin(2)<= pc(2) when cen(2)='0' and pc_sub(2)'event;

cin(3)<= pc(3) when cen(3)='0' and pc_sub(3)'event;

cin(4)<= pc(4) when cen(4)='0' and pc_sub(4)'event;

cin(5)<= pc(5) when cen(5)='0' and pc_sub(5)'event;

cin(6)<= pc(6) when cen(6)='0' and pc_sub(6)'event;

cin(7)<= pc(7) when cen(7)='0' and pc_sub(7)'event;

end mux_global;

[KhaiChein_Y_Intel]

Hi,

May I know what issue you are referring to? Could you provide the error message?

Thanks.

[KhaiChein_Y_Intel]

Hi,

May I know if you have any updates?

Thanks.

Best regards,

KhaiY