This manual (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/manual/rm_cve_fpga_dev_board.pdf) for a cycloneV devboard seems to describe a pin assigned twice (pin AK25 - page 36 & 37) which corresponds to HSMC_TX_D_P11 and HSMC_TX_D_N3 at the same time. I have checked on the board and the documentation seems to be correct. I'm trying to figure out if this is intentional and whatpurpose it could serve. Does anybody have an idea ? Thank you for reading :)
Yes, that looks like an error. In fact it looks like there are several errors. Use the schematic instead and disregard the pinout table in that document. You can get the schematic by downloading this zip file:
