Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21607 Discussions

[URGENT HELP] Add addition single Counter BIT HELP!

Altera_Forum
Honored Contributor II
2,772 Views

---------- Code Removed ----------

0 Kudos
19 Replies
Altera_Forum
Honored Contributor II
1,928 Views

 

--- Quote Start ---  

This code is loop from 0 - 99. 

--- Quote End ---  

 

Can't be seen from the code. 

 

--- Quote Start ---  

The led will turn on from 30 - 39 

--- Quote End ---  

 

Not true for the shown code.
0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

----------Code Removed----------

0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

The block diagram is not attached

0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

----------Code Removed----------

0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

----------Code Removed----------

0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

Isn't it easyer to put the 2 BCD counters in one process? Or in one VHDL file.  

 

your code seems right to me except u don't reset count_counter  

it will count to 255 in stead of 31. Or u can make  

 

signal count_counter: unsigned(4 downto 0);  

If count is 31 next will be 0 

 

Why it remains high for 31 till 39? Don't know the code seems right. No time to test it on a testbench srry
0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

----------Code Removed----------

0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

You are using the push button for clk ? 

 

Is the led hanging on the most significant BCD (counts 10 , 20 , 30 , ...)  

or the least significant BCD (counts 1 , 2 , 3 , ... , 9) ?  

 

in this case (every 31 counts) u need to hang it on the least significnat BCD (in your image the lower one). In the other one LED will be left open.  

 

What happens is : The lower one counts every time u push the button.  

When it reaches 9 the uppen one goes one up. So the upper one counts every 10 times. If u place "if (count_counter=2) then ... " in the upper one, it will remain high for 10 times or from 20 to 29.
0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

--------- Code Removed -------

0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

I don't understand your meanings. 

 

U are already using the component BCD_counter 2 times.  

 

1 time to count from 0 to 9 (0 , 1 , 2 , 3 , ...) 

1 time to count from 0 to 90 (0 , 10 , 20 ,30 , ...) 

 

Does that works ? If so -> than look for LED = 31 to blink.
0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

---- code removed ---

0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

Can i see the result of your testbench ?

0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

I tested out on circuit board. hmm, if there any way i can add a if statement on the pushbutton(clk) once i pressed 1 time, i able to automatic count_counter<=count_counter+1?? 

 

If
0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

Is it possible that your signal clk remains high or low ?  

 

Measure on the clk plz. (Hang an output on it)  

Its confusing if u use clk for an input pin cauze clk refers to clock.
0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

Without the schematic top entity, the intention of the design actually can't be understood. 

 

In my understanding, you have two, loosely related objectives: 

- Design a two-digit BCD counter 

- make it switch a led on count 31 

 

You have tried to solve it by separate counters, and curiously placed an additional binary counter into a BCD digit counter. That's really arbitrary, but not impossible of course. I don't want to support this crude coding style however and would suggest to connect the compare to the BCD counter output, so you have only one counter. 

 

The BCD counter upper digit is wired incorrectly. You are operating it as a ripple carry counter, if so, the upper digit must be clocked on the falling edge. But a ripple carry counter is bad coding style anyway. To make it a synchronous counter, you have to add carry in- and outputs. You can consult the LPM_COUNTER MegaFunction as a reference.
0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

Hey FVM, 

 

Ok, I understand, The block diagram is work as ripple carry counter. That caused i can't capture the value of double digits. I now have 2 separate 7 segment display. If i'm using single LPM_Counter to do the counter, also able to project 2 separate 7 segment display together? 

0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

As far as I remember, LPM_COUNTER doesn't offer a BCD counter option. So you would use to modulus 10 counters, carryout of the lower digit connected to carry in of the higher digit, clk parallel to both. Of course, you can implement the carry in and out also in a VHDL counter of your own.

0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

Hmm, FvM, 

 

let say if i using  

 

Digit1,Digit2 : in std_logic_vector (3 downto 0); 

process(digit1,digit2) 

 

is there any way to count 0 - 99 for digit1 and digit2 for output
0 Kudos
Altera_Forum
Honored Contributor II
1,928 Views

Yes, as said by setting up a two digit BCD counter, using two decimal (modulus 10) counters. Each decimal counter drives one digit. That has been basically correct in your schematic, just the overflow respectively carry wasn't.

0 Kudos
Reply