USB port unexpected disabled for Altera Cyclone V

[Altera_Forum]

Hello experts, 

 I am a USB driver developer. I have met a strange thing when I developing USB controller driver for Altera Cyclone V. Can anybody help me?    Sometimes when start a USB DMA bulk transfer with a USB1.1 full speed device, HPRT(address 0xFFB40440) register changed from 0x21405 to be 0x21809. That means device still connect but port disabled without overcurrent.    “prtena: A port is enabled only by the core after a reset sequence, and is disabled by an overcurrent condition, a disconnect condition, or by the application clearing this bit. The application cannot Set this bit by a register write. It can only clear it to disable the port by writing 1.”   The port is only disabled by overcurrent, disconnect, or by application. I have checked there is no overcurrent or disconnect and driver has not clear it.    Why the port disabled?    HPRT changed from 0x21405 to be 0x21809, that also means prtlnsts (Port Line Status bit 11:10) changed from 0x1 to 0x2. The USB1.1 full speed device still connect.    What happened will cause the prtlnsts changed when USB bus idle?    Thanks, Daniel

[Altera_Forum]

It was my understanding that the port line status bits are just a direct sampling of the data lines. Bit 10 should be the D+ line and bit 11 should be the D- line.

[Altera_Forum]

Yes, port line status are changing while USB bus active. But why port disabled when USB transfering?

[Altera_Forum]

Does it always fail or is it periodically failing? If it's always failing it could be due to the reset sequence not being followed. 

 If you file the service request that I mentioned in your other post I can provide you with some additional information that should make your driver development a lot easier.