Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20737 Discussions

Unable to Flash EPCQ32A via SFL IP

Altera_Forum
Honored Contributor II
1,600 Views

Hallo, 

 

we have a nasty problem with our new design. I tried it with several boards and the schematic is checked. The hardware seems fine. 

We use a Cyclon V 5CEBA4U19 device with a attached EPCQ32A Flash. 

 

When we programm the config directly via the .sof to the FPGA it works fine. This means the progress is 100% and Quartus 

says "Programmer operation was successfull" 

 

If I generate a .jic File to flash the EPCQ32A it fails. Progress stops at 89% and the error message is  

"Flash Loader IP not loaded on device 1" (see attached Images) 

It seems that already the SFL cannot programmed. 

 

https://alteraforum.com/forum/attachment.php?attachmentid=15630&stc=1  

Info (209060): Started Programmer operation at Thu Jun 21 11:17:09 2018 

Info (209016): Configuring device index 1 

Info (209017): Device 1 contains JTAG ID code 0x02B050DD 

Info (209007): Configuration succeeded -- 1 device(s) configured 

Error (209062): Flash Loader IP not loaded on device 1 

Error (209012): Operation failed 

Info (209061): Ended Programmer operation at Thu Jun 21 11:17:15 2018 

 

 

https://alteraforum.com/forum/attachment.php?attachmentid=15629&stc=1  

We tried 1000 of different options and videos and instructions, but nothing helps. 

 

- Windows 10 / Windows 7 

- Quartus Prime Lite Edition 18.0 (also tried with 17.1) 

- JTAG via USB Blaster 

- Cyclon V 5CEBA4U19 

- EPCQ32A 

- connected Signals EPCQ32A to the FPGA: D0-D4; DCLK; nCSO 

 

Can someone help? 

 

Marcus
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
825 Views

Hi, 

 

1. Are you using Dev Kit? 

2. How many devices are there in your JTAG chain? OR Are you programming to the correct device in the chain? 

 

Cross check the steps followed for generating the .Jic file. 

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/an/an370.pdf 

 

if the .sof file can be configured via jtag successfully then it is not a power issue since jtag configuration is successful. 

then it should be bitstream corruption. 

Suggestion 

1. Monitor nStatus & CONF_DONE pins. 

2. Try to program with .pof after loading the sfl image. 

Or check if you have selected correct EPCQ device. 

3. Check the P/N from the board and confirm. 

Refer below link for troubleshooting. 

https://www.altera.com/support/support-resources/support-centers/devices/cfg-index/fpga-configuration-troubleshooter.html 

 

Let me know if this has helped resolve the issue you are facing or if you need any further assistance. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
0 Kudos
FN0001
Beginner
825 Views

Hello,

 

Did you found a solution? I know this has been a while. I am also stuck with this. Let me know what you did to go around. Thanks

0 Kudos
Reply