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User Interface to control SRAM (cyclone iii starter kit board)

Altera_Forum
Honored Contributor II
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Dear Altera user, 

I'm using an altera board Cyclone iii start kit (with external Sram and Dram) 

I explain here the way I'am using it, but I'm looking for a better solution. 

The problem concerns the load/dump of the external sram. 

I have a design which needs to read the external Sram and write into it. 

I need to load the Sram with raw data, process the data with my design and then dump the memory to get the result. 

For loading/dumping the Sram, I used the Board Control Panel application. 

1) Start the Board Panel : load a file into the memory 

2) launch the Quartus programmer to put the Design in the FPGA 

3) Start the processing 

4) When it finishes, I reconfigure the Board with default *.sof (in order to get control panel working) 

5) Start the Board Panel : dump the Sram contents into a file 

 

Question1: How can I write an application (graphical or through console) to do the same thing without 

reconfiguring the FPGA, I want to configure the FPGA once with my design and be able to load/dump memory  

as often as I want.  

 

Thanks for your help
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Altera_Forum
Honored Contributor II
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I guess you dev kit has a serial port interface. So I'd use it to trasfer data to and from sram.

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Altera_Forum
Honored Contributor II
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Thanks Guru, no there is serial port on the board. If I can find a source code that controls the SRAM, which I can customize it by adding my Design, that could be a solution.

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Altera_Forum
Honored Contributor II
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sorry, there is no serial port !!!!

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

I guess you dev kit has a serial port interface. So I'd use it to trasfer data to and from sram. 

--- Quote End ---  

 

 

I was designing a SRAM Controller, but was unable to find a datasheet for the SRAM present in the CIII starter kit, can you kindly share the datasheet or link it would be helpful.  

PS:I was not able to find the datasheet over the internet.  

Thanks 

Regards.
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Altera_Forum
Honored Contributor II
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hello sriram7 

here is the reference of the SRAM of the Cyclone III starter kit : IS61LPS25636A-200TQL1 

and here is the link : http://elinux.org/images/3/33/is61lps25636a.pdf 

I will explain you the way I used it, this weed-kend , because now i'm really busy ! 

regards chahid
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Thanks Guru, no there is serial port on the board. If I can find a source code that controls the SRAM, which I can customize it by adding my Design, that could be a solution. 

--- Quote End ---  

 

 

The serial port or any other interface to the outer world can be implemented in fpga and interface signals routed to the spare GPIOs on HSMC connector.  

For sram sample code refer to the starter kit package: the starter kits always comes with a few design templates which show you how to use the board devices. 

 

You must first of all decide if you want to implement your design in hardware or software; and this depends on your design requirements. 

By software I mean you build a standard sopc system including Nios processor, sram controller and whatever you need by using Qsys ready made ip cores; then it's all a matter of programming your data elaboration in C language, like on a common microprocessor. 

On the other hand, if you need to process the data at high speed, you may need to go for the hardware solution: in this case you must describe everything in HDL.
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Altera_Forum
Honored Contributor II
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Hi Cris2, 

 

I have already the Hardware and it works. The hadware reads the Sram and then stores the result back into the SRAM. The data path: Sram -> DESIGN -> SRAM, works fine. But I have to use the Board control panel to fill the SRAM and to Read the Result from it. Suppose my DESIGN is in my_project.sof. The Board Control Panel doesn't work when I have my_design.sof in the FPGA, I have to reconfigure the FPGA (push the Button reconfig) to put (defaut image in the flash) default.sof, in order to get it working. I summarize all steps: 

 

1) Defautl image (*.sof) from the flash : I use the Baord panel to fill the SRAM with a file) 

2) I put my_design.sof in the FPGA 

3) I run the processing 

4) reconfigure the FPGA with defautl image (from flash) : I use the Board panel to read the result from the SRAM 

 

I'm looking for a solution to integrate a "Board panel like" function into my_design.sof 

 

I hope it's clear now ! 

 

Thanks very much for your effort and your time 

 

Chahid
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Altera_Forum
Honored Contributor II
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hello sriram7, 

 

Here is the way how i have implemented the sram controller for the ciii starter kit, schematic and timing relation ship, hope that can help you.
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Altera_Forum
Honored Contributor II
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Thank you very much Chahid, that's what I was looking for. Datasheet of SRAM. Was unable to find it on the internet. And thank you for the timing and schematics. 

Regards, 

Sriram
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Altera_Forum
Honored Contributor II
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hi! 

i'm having the same problem... 

did you solve it? if yes here is my email if you could help me yonatanhanann@gmail.com
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Altera_Forum
Honored Contributor II
885 Views

 

--- Quote Start ---  

hello sriram7, 

 

Here is the way how i have implemented the sram controller for the ciii starter kit, schematic and timing relation ship, hope that can help you. 

--- Quote End ---  

 

 

hi, could you publish your code please? 

or send it to me yonatanhanann@gmail.com 

i'm having problems with it to.
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