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Honored Contributor I
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Using Differential Inputs to Evaluate an Incremental Encoder

Hi, 

 

I would like to read in and evaluate the signal of the incremental encoder from a motor. 

I have the Deca Max 10 board; the signal input has a maximum of 2MHz.(Depending on engine speed) 

 

 

When the engine is running slowly, everything works fine. But if the engine is moving faster, i start miscounting the signal. I suspect it's because the signal gets worse with increasing speed. 

 

Currently I use simple IOs for the incremental encoder signals (A, A ', B, B'). I hope to get the problem under control by using genuine differential IOs of the FPGA. Do you think this premise is right? 

 

 

Currently I fail in this task. 

There are a few documents that deal with this topic but these confuse me more than they help 

 

The documents are probably aimed more at people who are already very familiar with the technology 

https://www.altera.com/en_us/pdfs/literature/hb/max-10/ug_m10_gpio.pdf 

https://www.altera.com/en_us/pdfs/literature/hb/max-10/ug_m10_lvds.pdf 

 

(https://www.altera.com/en_us/pdfs/literature/hb/max-10/ug_m10_lvds.pdf

 

Are there perhaps documents that explain the different IO-standarts(for beginners) or even better a tutorial that explains how to implement / instantiate a "real" differential input? 

 

Is LVDS the right IO standard for my purpose? And how can this be created in the Pin Planner. If I set a pin as LVDS, the pin-planner automatically creates the second input. E.g. a -> a(n). 

But I can not use a(n) in the code. 

 

Is it sufficient to specify the IOs as LVDS, or do I also need to instantiation an IP core from Altera GPIO Lite? 

Currently, i implement the diffenrential function with simple code like this: a_diff <= a_p and (not a_n); 

 

 

I'm stuck right now. What do I have to do? Where can I read what to do. 

I hope someone can help me or provide a new approach.
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