Hello everyone,I am using the DE1-SOC board which includes a 5CSEMA5F31C6 cyclone 5 FPGA chip and a EPCS128 Flash. So I am trying to use the flash in user mode and communicate with it through serial SPI. I have assigned the pins (DCLK, AS_DATA0,......,NCSO) using the assignment editor to the right connection as drawn within the schematic diagrams provided with the development board, but the problem is the quartus 2 give me an error saying that there is a conflict in connections and here is the full text of the error when assigning the clock for SPI communication: Error (14566): Could not place 1 periphery component(s) due to conflicts with existing constraints (1 I/O pad(s)) Error (175019): Illegal constraint of I/O pad to the location PIN_U7 Info (14596): Information about the failing component(s): Info (175028): The I/O pad name(s): DCLK Error (16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below: Error (169094): Can't place pin DCLK at location U7 (PAD_50) because that location is a dedicated programming pin location (1 location affected) Info (175029): PIN_U7 I know that these pins are used for configuration at the power-up of the FPGA as it called (reserved for programming pins), but there must be a way to have them available and could access them through the same pins after programming. I have looked so hard for this problem and I didn't find anything, so how could this be solved? Thanks,
--- Quote Start --- See this support solution (https://www.altera.com/support/support-resources/knowledge-base/solutions/rd10032012_663.html). Cheers, Alex --- Quote End --- Thank you Alex for the reply.