Using WM8731 Codec on DE2 board as an ADC

Altera_Forum · ‎06-08-2011

I'm using the WM8731 Codec on the DE2 board as an ADC by taking in audio from the Line In jack and sampling it at 48KHz. I've got a project setup to do this using code supplied by Altera/Terasic and from John Loomis' website (it won't allow me to post the link).

I also have Nios II module with a JTAG UART to print out the sampled input data. I've been testing it using an Agilent signal generator with DC and sine waves but I don't seem to be getting any meaningful results. I've configured the codec like this:


        Dummy_DATA:LUT_DATA	<=	16'h0000;
	//R0 - LEFT LINE IN
	SET_LIN_L:LUT_DATA	<=	16'h0017; // no gain, disable mute, disable sim load
	
	//R1 - RIGHT LINE IN
	SET_LIN_R:LUT_DATA	<=	16'h0217; // no gain, disable mute, disable sim load
	
	//R2 - LEFT HEADPHONE OUT
	SET_HEAD_L:LUT_DATA	<=	16'h0479; // default volume, disable left channel zero cross detect, disable sim load
	
	//R3 - RIGHT HEADPHONE OUT
	SET_HEAD_R:LUT_DATA	<=	16'h0679; // default volume, disable right channel zero cross detect, disable sim load
	
	//R4 - ANALOG AUDIO PATH CONTROL
	//A_PATH_CTRL	:LUT_DATA	<=	16'h0810; // Line->ADC, DAC on, no bypass or sidetone
	A_PATH_CTRL : LUT_DATA <= 16'H0802; // disable mic boost, enable mic mute, line->adc, disable bypass/adc/sidetone
	
	//R5 - DIGITAL AUDIO PATH CONTROL
	//D_PATH_CTRL	:LUT_DATA	<=	16'h0A06; // enable high pass filter, de-emph @ 48khz
	D_PATH_CTRL : LUT_DATA <= 16'h0A09; // disable high pass filter, no de-emph, dac soft mute, clear dc offset
	
	//R6 - POWER DOWN CONTROL
	POWER_ON:LUT_DATA	<=	16'h0C00; // everything on
	
	//R7 - DIGITAL AUDIO INTERFACE FORMAT
	SET_FORMAT:LUT_DATA	<=	16'h0E01; // MSB first left-justified, 16bit input audio, slave mode
	
	//R8 - SAMPLING CONTROL
	SAMPLE_CTRL:LUT_DATA	<=	16'h1002; // normal mode, bosr=1, mclk
	
	//R9 - ACTIVE CONTROL
	SET_ACTIVE:LUT_DATA	<=	16'h1201; // activate

An example of the output samples from the ADC when a 1v DC signal is applied:

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Any idea on what I'm doing wrong?

Altera_Forum · ‎08-04-2011

Hmm...

you are using the CoDec as slave, may be you could try to use it in master mode, so you only have to drive the MCLK. You will get BCLK and WCLK/LRCLK from ADC, if WCLK/LRCLK changes, you can collect the first of your 16 bits at the following rising_edge/posegde of BCLK.

For testing it seems to be easier than using CoDec in slave mode.

GL

Altera_Forum · ‎08-24-2012

Hi,

I'm trying to configure WM8731 Codec on DE2 board as an ADC too. But i have no idea how the whole thing works. I'd like to pump in music through WM8731 Codec, and pass the music signal to FPGA (I have designed a LPF and program in cyclone II), then obtain the filtered music signal through WM8731 Codec again. The purpose that using WM8731 Codec is just to demo the audio signal filtering process in real time. I'd like to disable the filtering function that provided by WM8731 Codec. Other than configuring WM8731 Codec, i will need another file for configuring i2c so that WM8731 Codec can communicate with FPGA (cyclone II) ? Am i rite?

Please guide me through this. If possible, i'd like to have a copy of codes as reference. I'm just a beginner. Your help will be appreciated :)

Altera_Forum · ‎08-28-2012

Hi HJ.C,

I think if you are beginner it's very hard to do this stuff all on your own.

May be this helps:

http://users.ece.gatech.edu/~hamblen/de2/

Go to

de2 software resources

and click on

altera de2 demos (http://users.ece.gatech.edu/%7ehamblen/de2/de2_demonstrations)

than you will see some example projects for the DE2 board.

Try

de2_i2sound/ (http://users.ece.gatech.edu/%7ehamblen/de2/de2_demonstrations/de2_i2sound/)

if it works with audio-in and audio-out, try to add your LPF stuff and check again.

You can try to change the project regarding the I²C stuff, too, so you will be able to configure the WM8731 as you like.

Hope it helps!

EGuer10 · ‎01-21-2020

Hi, I am interested in these links, but they are broken. do you have any information?

Altera_Forum · ‎09-22-2013

hi dp800, i saw your post, did you done the audio codec configuration? can i share your verilog code? just want to refer from you. i won't copy your code. i am doing a project about audio codec, really need your help. your help will be appreciate. thanks you~