Using external RAM with DCFIFO

[Altera_Forum]

Can someone please help me with some advice, a document or a design on how to interface the DCFIFO to an external RAM eg SDRAM. 

 I am busy with a design that processes high volumes of data received at high speeds. I am at the moment using the standard DCFIFO (with internal memory), but I find that the FIFO overruns, hence my need to store the data in a larger memory space.  I am working with the Cyclone III FPGA, and I wouldnt like to use the Nios to do this.  Thank you. Harold

[Altera_Forum]

Sounds like you need to build your own SRAM FIFO and not use a DC FIFO at all. There may be something like this already available.

[Altera_Forum]

Thanks Tricky. Can you please refer me to where I can find this?

[Altera_Forum]

You will probably have to build one yourself. I dont know of any specifically.

[Altera_Forum]

Hello, Tricky and htettey ! 

Do You have any news about any available SRAM-based FIFO or SRAM-based DCFIFO IPs?