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I’m using the alt pll reconfig IP to generate different output frequency and confonting a problem which puzzles me long.
The output frequency of PLL can be calculated as follows: Fout=F_in× (M/(N×C)) In which: F_in is the input frequency; M is the Feedback counter (M); N is the Pre-scale counter (N); C is Post-scale output counters (C0–C4) The inner diagram of pll: 1.jpg The blue circles check out the M,N,C, please notes the red circle which checks out the VCO post-scale counter K. And I’ve got some doubts about this VCO post-scale counter K. Let 50Mhz clock as input clock and 126Mhz as output clock. Now the parameters is like below: 2.jpg We can know from the picture that M=63,N=5,C=5 And the output frequency is:50*63/(5*5)=126Mhz Please note the red circle which checks out the VCO post scale counter is 2. In some other case the I set the output frequency is 138Mhz, and now the parameter is: 3.jpg M=69,N=5,C=5 The output frequency is:50*69/(5*5)=138Mhz But pls look at the picture: In which the VCO post scale counter is 1 I just want to ignore this VCO post scale counter, but in pll reconfig IP this para is used: 4.jpg So,would anybody could tell me how to calculate this VCO post scale parameter?Link Copied
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--- Quote Start --- So,would anybody could tell me how to calculate this VCO post scale parameter? --- Quote End --- IIRC, Cyclone IV has a nominal VCO range of 650 to 1300 MHz. When the VCO post scale counter is set the VCO range is divided by 2, i.e. 325 to 650 MHz. So if your calculated VCO frequency is >= 650MHz, use 1, if it is smaller, use 2. The interesting thing is that this has no influence on the calculation of the other counters. This is all from top of my head, so I hope I got things right, but I am quite sure that 650MHz was the "magic" limit. Regards, Thomas www.entner-electronics.com - Home of EEBlaster

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