VREFB pin in Cyclone V

[HiOh]

I am checking the pin connections for Cyclone V (5CGXFC7D6F27I7N).

I want to confirm if it is okay to leave VREFB3AN0 open, but there is no mention of it in the Pin Connection Guidelines (PCG-01014-3.2). (There is a mention of VREF[#]N0.) All IOs used in the 3A bank are 3.3V CMOS.

Is it okay to leave it open?

If not, what kind of issues might arise?

Thank you for your help.

[FvM]

Hi,
VREF pins are only used for voltage referenced I/O-standards HSTL and SSTL. IMHO you can leave it open if you enable weak pull-up for unused pins.

VREF[#]N0 means all VREF pins. Pin connection guidelines are suggesting "If the VREF pins are not used, you should connect them to either the VCCIO in the bank in which the pin resides or GND".

[HiOh]

Thank you for your prompt response.

To add a weak pull-up to the VREF pins, I should set "As input tri-stated with weak pull-up" in Device and Pin Options -> Unused Pins, correct? I didn't realize that VREF pins could be set as unused pins.

Although there is no mention of a pull-up for "VREFB3AN0" in the *.pin file, considering that other unused user I/O pins are set to "RESERVED_INPUT_WITH_WEAK_PULLUP," can I assume that the VREFB3AN0 pin is also pulled up?

[FvM]

Hi,

you are right VREF pin of Cyclone V is dedicated pin without IO function, other Cyclone families have shared  VREF and IO. Thus Cyclone V VREF hasn't pull-up feature and should be connected to GND or VCCIO when unused. 

Sorry for causing confusion.

Regards
Frank

[HiOh]

Thank you very much.

The reason I asked this question in the first place is that multiple boards have faulty JTAG pins (Bank3A), and I was trying to find the cause. 

Is it possible for such a situation to occur if the VREFB3AN0 pin is used as an open? 

Regards