Verify failed between address 0x80020 and 0x85ed7(address is sram)

[Altera_Forum]

Hi everybody! 

My new board has a sram on it,but when i run nios_cpu in it. NiosIDE show me that something wrong with sram,the information like as title, the 0x80020 is reset address,point to sram. I have test that unused pins set as tri_state input and data pins set as inout_pin.The welding is ok! Is there something others may call this?? Please help me if someone know something about it, Thanys!:confused:

[Altera_Forum]

do you have some on-chip memory in your SOPC design? In that case you can compile a memory test application and have it test your SRAM.

[Altera_Forum]

If i have on-chip- memory in my design,how to make a memory test application ? Do you means in the test to read and write the Sram?

[Altera_Forum]

From the Nios IDE, create a new project with the "Memory test" template. Configure the system library so that everything is put in the on-chip RAM (using the smaller standard library if needed) and compile it. 

Then run the application, and it will ask you for a memory address to run the test. Give it the address of your sram and check if it finds anything.

[Altera_Forum]

Thanks for your advice. 

I find a problem in sram setting,my sram is 512kbit and data bus is 16bit address bus is 18bit, but in nios_system sopc_builder give the address range for sram 0x80000 to 0xfffff, this may means sram address bus is 19bit?? i don't know is it right or not. Wish for your help!  shenhuan

[Altera_Forum]

I assume you meant 512kbytes. 

The address bus would be 19 bits if the memory data bus were only 8 bits. As your chip is 16 bits wide, the low significant bit of the address bus isn't used, and the other 18 are connected to the memory chip.