Verilog Syntax Error

Altera_Forum · ‎01-23-2011

I received this error while following a tutorial in a Verilog book:

Error (10170): Verilog HDL syntax error at resistor.v(3) near text ""disciplines.vams"; expecting ".", or an identifier, or "*", or "/"

Can anyone provide suggestions on how to fix this?

Thanks.

Altera_Forum · ‎01-23-2011

Are you trying to compile Verilog-AMS in Quartus II or ModelSim?

Altera_Forum · ‎01-23-2011

Does analog/mixed signal not work in Quartus II? I am using a text that refers to Verilog-AMS.

Also, another error pops up for the other modules I wrote:

Error (10170): Verilog HDL syntax error at capacitance.v(3) near text ""disciplines.vams"; expecting "<"

Thanks for the help.

Altera_Forum · ‎01-23-2011

--- Quote Start ---

Does analog/mixed signal not work in Quartus II?

--- Quote End ---

No...How would it?

-- slacker

Altera_Forum · ‎01-23-2011

Quartus II and ModelSim does not support Verilog-AMS. You need to ADMS compiler like QuestaADMS from Mentor.