Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Virtual pin

Altera_Forum
Honored Contributor II
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Virtual pin use in top level to connect logic that can decrease simulation time (timer, reset counter etc and target FPGA target application this virtual pin simulation control signal needs to be driven inactive. 

 

If I assign a virtual pin, Quartus II will assign this pin to “GND, VCC or Floating”? 

 

Kindly help 

Thanks
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Altera_Forum
Honored Contributor II
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Virtual pin is not exist in fact, So it will not be assigned to GND,VCC or others.

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