Want some help NIOSII with Custom logic project..

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Want some help NIOSII with Custom logic project..

935 Views

I'm using DE1 board with quartus 8.1. I want to Implement custom logic with use of PIO ports & Interface it to the PC through NIOSII. I was able to establish a RS232 link easily extending the CII_starter_SD_CARD_AUDIO_DEMO.

But I'm facing problems when adding PIO's for implement my custom logic. for the testings I just added 2xPIO 8bit ports as outputs & one PIO port as an Input. I instantiated them only in

system_0 u0 instance with .inport & .outport notations & used wires to connect them in between.

after generating the SOPC system it synthesize correctly. I can see the system.h file has been updated as I was expected. But when I use IORD function to read the INPUT port it always returns -1(255).

Can't understand whats happening Inside. Pls help me with this.

Link Copied

0 Replies

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.