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What is correct steps to compile the qsys design created in quartus?

VSing43
Beginner
519 Views

What is correct steps to compile the qsys design created in quartus?

I created my qsys design and then I created a separate quartus project and added my .qsys file in it. Once the quartus project was created I tried to compile my design but then It is failing in place and route. Getting the following error. I tried regerating from qsys again but I get same error upon compilation everytime. Please help

 

 

Error (14740): Configuration mode on atom "altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block|ufm_block" does not match the project setting. Update and regenerate the Qsys system to match the project setting.

 

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AnandRaj_S_Intel
Employee
280 Views

Hi,

 

  1. check tool and on-chip flash IP settings?
  2. Which configuration are you using? Single Compressed Image/ Dual Compressed Images
  3. Which all IP's you have used in your design?

Assignments -> Device -> Devise and Pin Options -> Configuration -> Set same has On-chip flash IP.

 

For information on configuration refer below link

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_config.pdf

 

For information on Creating a System Design with Platform Designer refer below links

https://www.youtube.com/watch?v=d43Pqc_IZpg

https://www.youtube.com/watch?v=tLz-QnZdQkw

 

Regards

Anand

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