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What is reset_req

Altera_Forum
Honored Contributor II
‎09-21-2013 01:42 AM
1,481 Views

Hi. I'm changing a preexisiting Qsys design. When I open it the tools upgrades my on chip memories to newer versions. The new versions have a signal that the old ones apparently didn't have. This signal is reset_req. I can't find a reference to this signal in any documentation. Does anybody know where I can find documentation for this? I'll probably export it, but I need to know what to do with it. 

 

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