Hi. I'm changing a preexisiting Qsys design. When I open it the tools upgrades my on chip memories to newer versions. The new versions have a signal that the old ones apparently didn't have. This signal is reset_req. I can't find a reference to this signal in any documentation. Does anybody know where I can find documentation for this? I'll probably export it, but I need to know what to do with it.
Thank you
