What is shadow register

[Altera_Forum]

What is shadow register and how do we use it

[Altera_Forum]

I copy and paste from the Nios developer manual: 

"A shadow register set is a complete alternate set of Nios II general-purpose registers, which can be used to maintain a separate runtime context for an ISR." Refer to the manual for further information

[Altera_Forum]

From a technical perspective, the nios general purpose registers are held in an internal memory block. This might be an M9K which could hold 256 32bit values, so with 32 registers there are (effectively) three address lines tied to zero. The 'shadow register' feature allows these high address lines be set - so you get 8 copies (4 copies for M4K) of the registers for very little extra hardware. 

 The register set could be switched by any code that needs to save all the registers, but doing so requires care - so it is probably only done for interrupts by and 'normal' code. All the users do have to agreee on the usage.

[Altera_Forum]

Hi dsl, may I know what do you mean by get 8 copies(4 copies for M4k)?

[Altera_Forum]

--- Quote Start ---  Hi dsl, may I know what do you mean by get 8 copies(4 copies for M4k)?  --- Quote End ---    Hi, NIOS register are 32bit long, M4K are memory block of 4Kbit, M9K are 9Kbit, if you use these block in 32 bit then size of resulting block memory is:   M4K: 4096/32 -> 128 memory cells or 128 registers  M9K: 9216/32 -> 288 memory cells or 288 register   NIOS register bank is 32 register wide so it fit 4 times on M4K (32bit x 32 register -> 4096 bit) and 9 times on M9K (32bit * 32 register -> 9216 bit), this time you need figure just 32 cells of 128 or 288 cells are used by NIOS register, SHadowing of register was known on old processor and usable for fast switching without push and pop to stack memory.  If you add very simple logic addressing the MSB 2 (M4K) or 3 bit of (M9K) memory block register bank can be changed and don't need save, they can be just restored writing back the bank selector.  About M9K yes theory say 9 register but really need 4 bit address, 4bit can address 16 blocks but only 9 are usable, it is better waste just one bank than infer complex logic.  Hope this can help.

[Altera_Forum]

Thanks! 

For example for M4K, Since just 32 cell is used by Nios register. Does it means that the other 96 cells are used as shadowing register?  Then, the push and pop to stack memory is not required with this 96 shadowing register?

[Altera_Forum]

--- Quote Start ---  Thanks! For example for M4K, Since just 32 cell is used by Nios register. Does it means that the other 96 cells are used as shadowing register?  Then, the push and pop to stack memory is not required with this 96 shadowing register?  --- Quote End ---    Hi, the other 96 cells can be unused or selected as a bank, we can do an example, imagine you have two program running and interrupt, if you switch from one program to the other then you must change register values, so you need push on stack then change stack value to new running program, when you need return running the other program this repeat over.  Now imagine you have banked register, you can assign one register bank to running task, when you exchange from one program to other just select new bank and jump on it, no saving and restore of register required.  When you have an interrupt service then again register used on interrupt service need to be saved on stack before executing service and restored before return, if you use a bank dedicated to interrupt service if just one interrupt has to be served just switching bank provide new register can be used freely due they are dedicated to.  Push and pop instruction are necessary and cannot be eliminated by multiple register bank,