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Hi there,
As the handbook tells, we can set three kinds of Slew Rate in "IO Assigment Editor" , 0,1,2, in which "0" means slowest and "2" means fastest. Is anybody knows what is the specific value of these numbers, in the "v/ns" unit? or at least give user some range to refer, like 1V/ns~3V/ns... Thanks a lot!Link Copied
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This is largely dependent on the load the pin is driving. Some manufacturers will specify a slew rate for a particular load (e.g. 15pF). Altera chose not to.
If you're designing something that is slew rate dependent then I'd suggest you don't rely on an FPGA to control that for you. Cheers, Alex- Mark as New
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I understand that slew rate is dependent on the actual capacitive load. but it seems to be meaningless if users are just told that "0,1,2" levels in Quartus only means "slow, medium, fast".
Thanks!- Mark as New
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Hi,
You could use the Cyclone IV IBIS model or Hspice model to do signal integrity simulation to verify the behavior of different slew rate to your setup. This will help you to select the optimal slew rate for your setup. Generally, faster slew rate you can have higher fmax but SI might degrade due to reflection. Slower slew rate you get lesser fmax but less reflection issue.- Mark as New
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hie xiaoyi594,
i think your original question was on the value of this slew rate. E.g. dv/dt in V/ns. bfkstimchan gave a very helpful comment, referring to the IBIS model. let me add on how i get this info. you can get a good idea of this "value" by referring to the RAMP (dv/dt) section of the I/O standard. i attached a screenshot example of how you would check this in your IBIS file. https://www.alteraforum.com/forum/attachment.php?attachmentid=10666 of cos just download the IBIS model from the link below for your device: https://www.altera.com/support/support-resources/download/board-layout-test/ibis/ibs-ibis_index.html good luck!- Mark as New
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Just to add that you should take note of the dv/dt info in the IBIS model is obtained using the load of 50Ohm resistor to ground.

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