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What is the speed for the soft serde in Stratix IV EP4sGX530

Altera_Forum
Honored Contributor II
‎03-06-2011 03:07 AM
1,494 Views

. 

I am using Stratix IV EP4sGX530( C3 speed) . 

My tool is Quatus II 10.0 

We know only Row I/Os support hard serde . 

so if I create LVDS mpdule in Column I/O , we must check " implement Deserializer circuitry in logic cell" , and create soft serde. 

Now question is , 

What is the speed for the soft serde in Stratix IV EP4sGX530? 

I wish it at least reach 625M data rate or higher?
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Altera_Forum
Honored Contributor II
‎03-06-2011 12:18 PM
772 Views

The data rate is limited by the core clock, the involved DDR registers and the I/O. I would expect at least 800 Mbps. But without the hardware SERDES DPA functionality, you'll possibly have difficulties to get meaningful data from the serial input, considering delay skew.

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Altera_Forum
Honored Contributor II
‎05-23-2016 06:35 AM
772 Views

Hi, 

 

How to implement soft-Serdes in core logic?
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