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Why 1 times DMA transfer only support 256K byte in Qsys DDR3 reference design?

Altera_Forum
Honored Contributor II
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Hello, 

I met an issue when develop PCIe card. 

my design is on the basis of Qsys DDR3 reference design. 

I found 1 times DMA transfer from FPGA to PC host only support max 256k byte. 

I need enlarge to 2M byte during 1 times DMA. 

which parameters need to modify? 

 

Thanks in advance. 

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