- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Cyclone 3 - device has 66 M9K blocks.
I set up 16384x36 memory chunk. It is 589824 bits, with device having 608256 bits. However quartus says it is too much, and says device needs to have 72 blocks to fit memory I need. What's an issue? Thank you for tips.Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
The issue will be the way you are using the ram, and you're not using it in an efficient way, so some on board ram is wasted.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Waisted? I try to use it the best way - as a single contiguous chunk. At leat it is my current understanding.
Any suggestion other than stating that I do _something_ wrong?- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
It should be possible to build that memory using 64 M9K blocks and some logic elements as well. This memory will be spread across the entire chip so do you really need such a large memory?
Are you sure that memory is the only one in your design? If you include IP or large lookup tables they could also be consuming on-chip memory resources.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- It should be possible to build that memory using 64 M9K blocks and some logic elements as well. This memory will be spread across the entire chip so do you really need such a large memory? Are you sure that memory is the only one in your design? If you include IP or large lookup tables they could also be consuming on-chip memory resources. --- Quote End --- This is what I am curious about. I planned to have 64 blocks, but it wants 72. error (170048): selected device has 66 ram location(s) of type m9k. however, the current design needs more than 66 to successfully fit After splitting to two memories 16K words each * 18 bits, it still wants 72 blocks scope_mem:buffer0_ram|altsyncram:altsyncram_component|altsyncram_pho1:auto_generated|ALTSYNCRAM AUTO Simple Dual Port Dual Clocks 16384 18 16384 18 yes no yes no 294912 16384 18 16384 18 294912 36 None Unassigned 1 scope_mem:buffer1_ram|altsyncram:altsyncram_component|altsyncram_pho1:auto_generated|ALTSYNCRAM AUTO Simple Dual Port Dual Clocks 16384 18 16384 18 yes no yes no 294912 16384 18 16384 18 294912 36 None Unassigned 2 And yes, I need large buffer, spanning through whole internal memory. edit: just notices i use dual-port memory model. does it change anything while size of the memory remains the same?
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
It depends on the dual-port mode you are using - see pages 43-46.
http://www.altera.com/literature/hb/cyc3/cyclone3_handbook.pdf Based on the error message, I'd guess you were trying to use true dual-port mode. Cheers, Dave- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- It depends on the dual-port mode you are using - see pages 43-46. http://www.altera.com/literature/hb/cyc3/cyclone3_handbook.pdf Based on the error message, I'd guess you were trying to use true dual-port mode. Cheers, Dave --- Quote End --- Not sure... Seems to be simple mode. BB file shows module scope_mem ( clock, data, rdaddress, wraddress, wren, q);
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Okay guys, I created new RAM instance, 1-port, and it still says I can not fit 16384x36 memory into the cyclone 3 chip (Q240), and it needs 72 M9K blocks instead of expected 64.
There should be something wrong.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- Okay guys, I created new RAM instance, 1-port, and it still says I can not fit 16384x36 memory into the cyclone 3 chip (Q240), and it needs 72 M9K blocks instead of expected 64. There should be something wrong. --- Quote End --- Do you have option of maximum block depth. setting this option can change the memory requirements. Try it in megawizard and read the resource in M9k directly on the wizard.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Good catch kaz. If that doesn't resolve it copy and paste the underlining hardware parameterization of altsyncram into a post (it should be one layer below the black box file in the design heirarchy)
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- Do you have option of maximum block depth. setting this option can change the memory requirements. Try it in megawizard and read the resource in M9k directly on the wizard. --- Quote End --- Wizard says block type "auto" and max block depth "auto". Resource really says 72 M9K. I have played with number of words. Choosing 1024 gives 4 M9Ks, but choosing 2048 (twice more) gives 9 (nine!) M9Ks! I also played with bus width and it seems to me that 9th bit of the M9Ks is being lost in my setup. When I set bus width to 32 bits, it properly displays 64 M9Ks.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- Wizard says block type "auto" and max block depth "auto". Resource really says 72 M9K. I have played with number of words. Choosing 1024 gives 4 M9Ks, but choosing 2048 (twice more) gives 9 (nine!) M9Ks! I also played with bus width and it seems to me that 9th bit of the M9Ks is being lost in my setup. When I set bus width to 32 bits, it properly displays 64 M9Ks. --- Quote End --- if you set width to 36, depth to 16384, block depth to 1024 or less you should get 64 M9Ks plus extra logic. Is that what you mean?
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
and the explanation (as far as I know) is that the parity bit is available across 1024 locations (or spread across as 2*512,4*256). any depth > 1024 loses it. This parity bit itself is not used as parity in the first place! as far as I know.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- and the explanation (as far as I know) is that the parity bit is available across 1024 locations (or spread across as 2*512,4*256). any depth > 1024 loses it. This parity bit itself is not used as parity in the first place! as far as I know. --- Quote End --- Oh thank you so much - it worked!

- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page