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Wire the unused clk input pins gnd inside the fpga?

Altera_Forum
Honored Contributor II
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Hi,my problem is that i left the unsed clk input pins floating.I haven't realised this would rise power consumption untill the pcb board is already made. 

Can just wire them to gnd or pull them down inside the Cyclone II ? 

Thank you
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Can just wire them to gnd or pull them down inside the Cyclone II ? 

--- Quote End ---  

No, they are input only and don't expose pull-up resistors are other termination means. Simply accept a certain excess current consumption and correct the problem as soon as possible.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

No, they are input only and don't expose pull-up resistors are other termination means. Simply accept a certain excess current consumption and correct the problem as soon as possible. 

--- Quote End ---  

 

 

Thankyou. 

I am still confused about the difference of connecting the pin to GND on board with GND inside FPGA. 

Besides,if i use the positive pin of clk,need i also connect the negective pin to gnd?Is the negective one "unused"?
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