Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
공지
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 토론

Write contention on dual-ported M9K blocks

Altera_Forum
명예로운 기여자 II
1,111 조회수

I've an M9K memory block configured as 'true dual port' with a single clock and OLD_DATA. 

 

I know that if both ports write to the same location then the written data is undefined. 

 

Does anyone know whether it is safe to write to different parts of a 32bit word? 

 

I've a test failure that is consistent with data being corrupted on concurrent writes 

to the high and low bytes of a 16bit quantity. 

 

Might it depend on how the larger memory block is made up of M9Ks? 

The high and low 16bits will come from different M9K blocks, but the 32bit word 

could come from 4 M9K blocks. 

So on a byte write one some the blocks will see a write with no byte enables asserted.
0 포인트
1 응답
Altera_Forum
명예로운 기여자 II
397 조회수

Further investigation has shown that it was all my fault :-(

0 포인트
응답