Programmable Devices

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Programmable Devices

Discussions

Core voltage too high on Stratix V Gx speed grade 2

Support USB / UART Bluetooth HCI Interface for Altera cyclone series,

No solder paste was applied on Thermal Pad for AGND. What would this do?

Detection problem in JTAG with MAX7000S

Does the default HPS preloader/u-boot disable L1 and L2 cache?

Data flow diagram generation from c source

Low end Altera FPGA to compare with Lattice...

DATA acquisition from unknown port of ASIC board

Chip-to-Chip AXI for Altera

EP4CE30/40 missing F324 orcad schematic symbols

FPGA-to-HPS SDRAM vs. HPS-to-FPGA

Cyclone III PLL loses lock at >75C

mSGDMA stride reads/writes

Associating a VHDL RECORD with a buffer

DDR3 Burst BL8 problem

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