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Valued Contributor III
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calculate power dissipation in cyclone fpga

Hi, 

 

I am using cyclone fpga and i need to determine the power dissipation of my device. 

 

in quartus powerplay power analyzer asks for a *.asf or *vcd file as power input file. How to generate those files??? 

 

furthermore why there is no information in the cyclone device databook about the power dissipation of the device? 

Maximum input and output current flowing in the core when it is running at a maximum allowable clock speed and the fpga is using almost 90% of its logic space... 

 

please help...
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Valued Contributor III
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Re: calculate power dissipation in cyclone fpga

Yes, they talk about power play estimation like it's easy to do. Just simulate your design and input the results and hey presto you can easily predict your power consumption. 

 

IT IS FAR FROM STRAIGHT-FORWARD! 

 

There are some assumptions you can make and you can play around with the tool to get some idea of best/worst case figures. That's what I would do. Input what data you have on switching speeds etc of your I/O and get a feel for the range of probable outcomes. If it predicts 10 amps on an I/O rail you know you've done something wrong! 

 

When I designed our Stratix III product I could not provide simulation output because I hadn't designed the firmware at the time I was designing the hardware. Doh! 

 

If it helps, 4 Stratix III devices running a large design (90% logic, lots of LVDS I/O and DDR2 and SRAM etc) and support circtuitry = 35W. Each FPGA is probably about 5W ish at a guess. 

 

Large pinch of salt and common sense required.
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Valued Contributor III
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Re: calculate power dissipation in cyclone fpga

take a look at the EPE worksheets. keep in mind they are an estimate, but you have many variables to play with 

 

http://www.altera.com/support/devices/estimator/pow-powerplay.jsp
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