can the NIOS II assert arbiterlock to a mm-slave?

[Altera_Forum]

I have a nios II processor that has to access a mm-slave. There are several other mm-masters that also need to access the slave. The slave is an altera SPI controller and all of the masters need to be able to do two sequential writes and then a read from an external SPI device. I don't want any of the other masters accessing the SPI controller until the nios is finished with the write-write-read sequence. Is there a way for the NIOS to set an arbiterlock bit high until it has completed the sequence. I used this logic in my custom memory mapped masters, but I cannot seem to figure out how to make the NIOS assert arbiterlock. 

  thanks!

[Altera_Forum]

No it isn't possible. I see two ways of doing what you want: 

[list][*]Don't use the SPI controller directly from the CPU, but design a kind of mm-slave -> mm-master bridge between the CPU and your slave, that will use the arbiter lock. [*]Add a hardware mutex that both the CPU and your other masters must lock before using the SPI slave (and in that case you don't need the arbiter lock anymore). Hardware mutexes were designed for multiprocessor configurations, but it can work for that too.[/list]