compiling and synthesis of the sample processor in verilog using Quartus 2 version12

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

compiling and synthesis of the sample processor in verilog using Quartus 2 version12

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hello all ,

recently i"m trying to understand in depth the function and the real architecture of a simple microprocessor , so i used this code to compile and synthesis it , but the surprising thing that when i'm go to the net list viewer using RTL viewer or technology map viewer i couldn't see the real components of this processor ,you can see every thing in attached files. so can some one please tell me how to view all the components?

Quartus 2 version 12 web edition.

thx in advance

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