components base address and offsets

[Altera_Forum]

I know how to get the base address of each component in a NIOS II system "Qsys" or the "system.h" file. 

 What I dont understand is what is the offset and how to get it.  for example component's base address starts at 0x0000 and ends at 0x0001, does this represents a 32bits line and the offset is the index of the byte to read ?  If that the case, how do I know how the bytes are mapped to the component pins ? ( writedata is the first or the second ... ?)

[Altera_Forum]

If you are talking about the macros like IORD_32DIRECT, offset is just how many bytes from the base address. 

For example if you have a component which has two 32bit registers, you might have something like this:  BASE = 0x1000 //some base address LENGTH = 2 //2 registers  Then to read the first register you would have IORD_32DIRECT(BASE, 0); //first register is at BASE+0 bytes To read the second register you would have: IORD_32DIRECT(BASE,4); //second register is at BASE+4 bytes (aka BASE+32bit)  If you were trying to access fourth byte of the first register you would do: IORD_8DIRECT(BASE,3); //fourth byte of first register is 3 bytes after the base address.

[Altera_Forum]

tha's very helpfull. thank you

[Altera_Forum]

OK I did not get it, here is my components slave interface : 

port ( clk : in std_logic;  resetn : in std_logic;  read : in std_logic;  write : in std_logic;  chipselect : in std_logic;  writedata : in std_logic_vector(15 downto 0);  byteenable : in std_logic_vector(1 downto 0);  address : in std_logic_vector(1 downto 0);  readdata : out std_logic_vector(15 downto 0);  SIG_EXT : out std_logic_vector(1 downto 0) );  How do I write some data to the ""writedata"" pin ???

[Altera_Forum]

IOWR_16DIRECT(BASE_ADDRESS, 2*(address),DATA); //write 16bits of 'DATA' to the component at 'BASE_ADDRESS' plus offset. 

 Data is 16bit so addresses on your 'address' bus are spaced 2bytes apart, hence multiply by 2 when passing to the write macro. The base address can be found in the "system.h" file in the Nios BSP.

[Altera_Forum]

what do you mean by (address), is it the "2 bits pin" ?? 

 if that's the case, well, I am not using it in my system (architecture) !  I just added to the entity to avoid any errors when "Qsys" generates the system.

[Altera_Forum]

A memory mapped interface has an address bus, and one or two data buses (read and/or write). 

 Your component has a 2bit port called 'Address' which I presume is the address line for your Avalon-MM slave.   If you are not using the address line, just assume address is 0, so offset will always be 0.

[Altera_Forum]

Whenever I build my project in Nios II IDE I get this error : 

 make: Interrupt/Exception caught (code = 0xc0000005, addr = 0x403a39)  how can I fix that ?