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Good day everyone!
we plan to start a project which based on ARRIA II, but I have a doubts about configuration without cpld (MAX II) ... we want to use an AS configuration protocol, in this configuration we need +3.3V for EPCS & for 8C bank (CSO, DCK, TDI, TDO, TMS, TCK, ASDO, D0 signals) of FPGA ... All our peripherals are using +1.5V & +2.5V only, therefore +3.3V will be using only for programming of the FPGA! Could anyone to explain how to connect VCCPD & VCC of the 8C bank (CSO, DCK, TDI, TDO, TMS, TCK, ASDO, D0 signals) rightly it'll helps to except any mistakes in design?! Best Regards, Roman.Link Copied
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