Just after a quick/general comment as I am a bit new to HDL.I was struggling to get much over 30kHz on my i2c connection because my code on my Nios II processor was not handling the interrupts quick enough (1 interrupt per byte). I was holding the clock line down while it waiting for the ISR to be serviced, but the slave did not like this. So, knowing the read and write always consists of 1 byte address and 2 bytes read or write, I modified the i2c HDL to do it all and just have an interrupt on the final stop. It seems to work fine at 900kHz now but the signals look like shark fins. I do sample rather than edge detect to read the data. Is this how I should address the issue? Does anyone do this in practice? regards, Graham
I have a cheap scope - Rigol DS105E that is rated at 50Mhz with 100Mhz rated probes. Got some rather long wires soldered onto the pads...(maybe that is the issue?)http://www.alteraforum.com/forum/attachment.php?attachmentid=12121&stc=1 http://www.alteraforum.com/forum/attachment.php?attachmentid=12122&stc=1
I don't think that this is a problem with your meassuring method. Otherwise the falling edges would also look like "shark fins".But your Outputs seem to be too weak to pull up the lines fast enough. Normally you have pull-up resistors on your lines. Which value do they have? Are there any capacitors connected to the lines? Which drive strength and slew-rate did you apply to the outputs?
Hi Steffen,I'm using "weak pull up resistors"... set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to D5M_SCLK set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to D5M_SDATA On the slave side there is a 1.5K pull up resistor on the data line. I'm not sure if it makes much difference (being open drain?), but in the pin planner, the drive current is set to 16mA. (I use values 0 and 'z') Slew rate is the default 1. The little shark fin is just the remains of ack driven by the slave (meant to be low). I don't think there are any capacitors in the circuit as such. However there might be some protection resistors in line.
Normally I think 1.5k Resistors as pull-ups should be enough. Also your drive strength is already high enough.You have three options to try: - change the pull ups to 1k and meassure again. Compare if the Signal is better or the same. Don't use less than 1k! - Can you change the slew-rate to 2? - Can you use a active '1' instead of 'Z' for bits which are really high on the bus. Use 'Z' for inactive, ACK and data-receive. I once had also written an custom I2C-Core and I used '1' for all active high Bits generated by the master. As I remember, my bus also shows this "shark-fins" on edges from '0' to 'z' but not from '0' to '1'.