- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
hello,
is there any dedicated memory for LUT (for example sine or cosine LUT) on the fpga cyclone 2? if yes, how can I modify it? thanks DoraLink Copied
2 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Please download the Cyclong II handbook:
http://www.altera.com/literature/lit-cyc2.jsp You don't have to read it word for word, but it goes over device resources(PLLs, M4Ks, DSP blocks, IO standards, etc.). For instantiating memory(like a COS/SIN table), the Quartus II handbook goes into inferring these in VHDL or Verilog. Probably the easiest is to use the Megawizard to create a ROM, and then you create a Memory Initialization File with the contents you want(the output of the MegaWizard can be instantiated into VHDL/Verilog/schematic/etc.) There's a lot of good information in the literature on the website. If you go through that and then ask questions, you'll get better responses, as most posters don't want to reiterate what's already in the documentation. Hope that gets you going in the right direction.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
LUT isn't the COS/SIN table. To creat a COS/SIN table in your design,follow "Rysc's reply".

Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page