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dynamic reconfiguration on stratix V FPGAs logic region not transceivers

Altera_Forum
Honored Contributor II
‎06-17-2011 06:57 PM
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hey hi 

 

can any one here explain or provide me an idea/tutorial on how to perform dynamic partial reconfiguration in altera stratix V FPGAs using quartus II 11.0. I am looking for the dynamic reconfiguration of the logic region not the transceivers. Something similar to the xilinx virtex fpgas 

 

Thanks, 

shayan sengupta.
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Altera_Forum
Honored Contributor II
‎06-17-2011 07:35 PM
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partial reconfiguration is not yet supported in software. take a look at the Upcoming Stratix V Features document: 

 

http://www.altera.com/literature/hb/stratix-v/uf_01002.pdf
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Altera_Forum
Honored Contributor II
‎06-20-2011 08:53 PM
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could you please tell when can i expect a quartus version with partial reconfiguration support for stratix V

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