help:line following robot

[Altera_Forum]

Hi there  

I am very new in VHDL I want to write a code for line following robot , but I faced a lot of problems because I started from zero. I spent already more than two months to learn it. when I started to write the code I got stuck and I couldn't know how to start.   could any body help me with that      I will be more than thankful   thank you a lot

[Altera_Forum]

hear I come. 

 I have just done this document. http://www.akiron.com/fpga/baseprojectinverilog.zip  if you have DE0(from Terasic) you can follow this document. if you don't, you can imitate this document.  I am writing Altera FPGA's instruction documents for people like you.  just read it and contact to me. if you don't under stand it. I will correct the document. if the document is useful for you, press like button on facebook :-p  see you.

[Altera_Forum]

this one about Verilog  

i am using VHDL do you have for VHDL

[Altera_Forum]

here it is. 

http://www.akiron.com/fpga/baseprojectinverilogvhdl.zip  I would like you to try VerilogHDL as well.  see you.

[Altera_Forum]

OK  

thank you a lot  i will try to understand it first

[Altera_Forum]

me come back again 

i sent to your email(i found it in the file you give me)anther code free of error but i am still confusing how to arrange the motors how to control the speed  is it can function if implemented it  thank you a lot

[Altera_Forum]

hello adel 

 I'm sorry not contacting you such a long time. you may have solved your problem by yourself.  but, if you have chance to read my document. see the file below. http://www.akiron.com/fpga/pwm_basic.zip  this is how PWM is and how to create it.  it is written by both VerilogHDL and VHDL. since I am not familiar with VHDL. this code maight not be smart.  at lwast it works. try it.  thank you for your question, it was good chance to study of VHDL for me as well. if you have question, ask me again.  see you.

[Altera_Forum]

thanx alot 

 do you have converter from verilog to vhdl with license

[Altera_Forum]

no I don't  

 Why you want to write in VHDL? Verilog HDL is good language. Is your TEST must be written in VHDL?

[Altera_Forum]

yes i have to write in VHDL my lecturer require from me 

 thanx a lot almost done

[Altera_Forum]

It's good to know people are here who are prepared to help without charging for it. You have helped me to further my studies.