i2c controller

[Altera_Forum]

hi everybody, 

 I have a problem in compiling a file in Quartus 7.0 . here is my procedure.  I download the gpio.zip in the address below http://nioswiki.jot.com/wikihome/operatingsystems/video.  I create a new component in sopc with the class.ptf file in the gpio.zip folder , and after generating the system , I compile the file of type BSF who was generated in a new project. There is an error in the compilation result. here it is : # ################# Warning: Using design file gpio_0.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project Info: Found entity 1: gpio_0 Info: Elaborating entity "gpio_0" for hierarchy "gpio_0:the_gpio_0"  Error (10130): Verilog HDL error at gpio_0.v(55): parameter "WIDTH" is not a formal parameter of instantiated module Error: Can't elaborate user hierarchy "gpio_0:the_gpio_0" Error: Quartus II Analysis & Synthesis was unsuccessful. 2 errors, 9 warnings Info: Allocated 132 megabytes of memory during processing Error: Processing ended: Wed Feb 06 16:24:59 2008 Error: Elapsed time: 00:00:13 Error: Quartus II Full Compilation was unsuccessful. 2 errors, 9 warnings # ####################  can someone help me to solve the problem??:)

[Altera_Forum]

Have you defined the paramter WIDTH?

[Altera_Forum]

I saw WIDTH regularly defined in the orginal source and couldn't understand the error. May be it was edited in this regard.

[Altera_Forum]

ok... if someone can solve , i'll be very happy.:)

[Altera_Forum]

Hello, 

 the error isn't about gpio.v but about gpio_0.v, as far as I understand a wrapper that instantiates gpio.v I would analyze the said files, if the error message is plausible or not. I can't check it cause I'm not using NIOS and didn't install the tools yet.  Regards, Frank

[Altera_Forum]

ok Frank , i will check... 

 thank's