- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
can sir/mam plz tell me how i establish logarithm or log compression in vhdl code?
Link Copied
2 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
That really depends what you need. What is the input datatype (integer, fixed point, floating point) how many bits; which precision do you need? Bad news is: you cannot just type a <= log(b); and hope that the synthesis tool will take care of the rest.
On one extreme, if you want a 64 bit float input and output, I guess you will need to spend money on buying an IP core. On the other hand, if you want a 6 bit fixed point input, you can probably just use a lookup table. That is a ROM that contains all the pre-calculated values. If you need more precision than what can be stored in a lookup table, you could create a rough lookup table and do interpolations from there (first order or second order). There are a lot more possible implementations.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- On one extreme, if you want a 64 bit float input and output, I guess you will need to spend money on buying an IP core. --- Quote End --- If you want to calculate a log or other mathematical function, you can always refer to a series representation, that's also used when calculating it in a numerical coprocessor. http://en.wikipedia.org/wiki/series_(mathematics) To save resources, a sequential calculation is mostly preferred.

Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page