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loop in VHDL

Altera_Forum
Honored Contributor II
1,840 Views

Hi, I have a question. now there are 3 vector connect with AND gate like this: 

 

C(3)<= A(4) and B(3) 

C(2)<= A(4)and A(3)and B(2) 

C(1)<= A(4)and A(3)andA(2)and B(1) 

C(0)<= A(4)and A(3)andA(2)andA(1)B(0) 

 

How can I use loop to describe it?
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Altera_Forum
Honored Contributor II
752 Views

Do you want to write generic code or do you simply want to use a 

loop construct on the actual code you've posted? 

 

Using a loop construct on your actual code will make it worse imho.
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Altera_Forum
Honored Contributor II
752 Views

with generic code, like: 

C(n-1)<= A(n) and B(n-1) 

C(n-2)<= A(n)and A(n-1)and B(n-2) 

...... 

C(0)<= A(n)and A(n-1)......and A(1)B(0). 

upstair is a example for n=4
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Altera_Forum
Honored Contributor II
752 Views

 

--- Quote Start ---  

Do you want to write generic code or do you simply want to use a 

loop construct on the actual code you've posted? 

 

Using a loop construct on your actual code will make it worse imho. 

--- Quote End ---  

 

 

 

with generic code, like: 

C(n-1)<= A(n) and B(n-1) 

C(n-2)<= A(n)and A(n-1)and B(n-2) 

...... 

C(0)<= A(n)and A(n-1)......and A(1)B(0). 

upstair is a example for n=4
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Altera_Forum
Honored Contributor II
752 Views

 

--- Quote Start ---  

with generic code, like: 

C(n-1)<= A(n) and B(n-1) 

C(n-2)<= A(n)and A(n-1)and B(n-2) 

...... 

C(0)<= A(n)and A(n-1)......and A(1)B(0). 

upstair is a example for n=4 

--- Quote End ---  

 

 

BTW: What does A(1)B(1) mean?
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Altera_Forum
Honored Contributor II
752 Views

Try something like that 

 

for i in 0 to n - 1 loop for j in i + 2 to n loop a_res := a(j) and a(j - 1); end loop; c(i) <= a_res and b(i); end loop;But be aware that it's untested code. 

You've to verify it. :) 

 

edit: 

 

That's definitely not it! :( 

But I think you've to use nested loops...
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Altera_Forum
Honored Contributor II
752 Views

I think something like that would do the trickfor i in 0 to n - 1 loop a_res := a(n); for j in i + 1 to n - 1 loop a_res := a_res and a(j); end loop; c(i) <= a_res and b(i); end loop;Yes the nested loops ides is the right one, you just need to initialize the variable and use it recursively in the inside loop. Don't forget to declare the variable in the process.

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