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multipliers + RAM blocks limitation

Altera_Forum
Honored Contributor II
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Is there a limitation on the number of embedded multipliers plus RAM blocks that can be used on a Cyclone IV? 

 

In some FPGAs (such as SPARTAN 3E) a data bus is shared between multipliers and RAM blocks, so you can use either one or the other. That implies that the number of multipliers plus the number of RAM blocks that can be used is limited. Is this limitation present in other FPGAs?
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Altera_Forum
Honored Contributor II
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I dont know of any such limitation. 

So feel free to use them all.
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