my design works on simulation but doesn't on the board

[Altera_Forum]

hi, 

 i'm trying to test my design on a cyclone II FPGA board..in my design ,there are two clocks...the problem is that my design works perfectly on simulation, but when i tried to test it on the board, it doesn't work...i don't know how to debug it!! it is not a problem of configuration..i verified the pin assignement and all those things..also, i tested it into a two different xilinx FPGA: it works on the first ,but it doesn't work on the second..it seems like it is a problem related to timing or some thing like that  could anyone give me some ideas on how to debug my design without using simulation..because as i told you, it works perfectly on simulation..  thank you

[Altera_Forum]

I suggest you post some source code. That is the first clue. There are many things you can do in code that end up working completly differently in simualtion that they do on hardware. And you mention two clocks : how are these clocks generated?

[Altera_Forum]

hi, 

 thank you for your answer.. actually, my design contains a mips processor with a memory, a network on ship and also an uart..on the cyclone II, there are two different generated clocks.. the fist one has a frequency of 28MHz and the second one is 50MHz frequency..so in the pin assignement i assigned my clock port to those different pins...

[Altera_Forum]

have you tried looking at things using signaltap?

[Altera_Forum]

thank you.. this seems to be a good solution..i will try it