nCE signal behavour

[Altera_Forum]

Hi everybody, 

 there is a small question about nCE behavour. It is safe to change nCE signal after Cyclone II FPGA have been configured? Or the Cyclone II FPGA will be reset in this case?  Thank you.

[Altera_Forum]

Julianus, 

 The Cyclone II handbook (see http://www.altera.com/literature/hb/cyc2/cyc2_cii51013.pdf Page 66) states that nCE must be held low during configuration, initialization & user mode.   Additional information can be found in the Cyclone II pinout documents (see for example http://www.altera.com/literature/dp/cyclone2/ep2c15a.pdf). Here it is mentioned: When nCE is low, the device is enabled. When nCE is high, the device is disabled.   Clearly, you must ensure that nCE is held low after configuration.  --jmv

[Altera_Forum]

To answer your direct question, after configuration the nCE pin will act like a Chip Enable. 

 If Low, then the chip will function externally as desired.  If High, then the I/O of the most likely Tri-state, and the internals will pause. I do not think that the internals will Reset (and require a reconfiguration), which is what I believe your question is asking about.  If you have an eval board, I suggest you give it try.