Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21336 Discussions

nSTATUS pin is low.

Altera_Forum
Honored Contributor II
‎01-06-2011 11:37 AM
971 Views

All powers(core,I/O……) are well,but after power up,the nSTATUS is always low level,why?Is the FPGA chip damaged?

0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎01-06-2011 12:05 PM
339 Views

check this link 

http://www.alteraforum.com/forum/showthread.php?t=5854 

 

 

Regards, 

shahul
0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.