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nconfig cyclone V pin usage

Smith222122
Beginner
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Hello,

 

I'm wondering what happens exactly if I drive the nConfig pin low on Cyclone V SoC devices. The pin guidelines say that reconfiguration is initiated, the device enters a reset state, and I/Os are tristated.

Does the FPGA fabric see this signal so that flip-flops initialize in a defined state or does the FPGA rely on Power up values after the nConfig pin is driven low?

 

Thank you

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NurAiman_M_Intel
Employee
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Hi,


You can read more about nconfig driven low in Cyclone V device handbook.


https://www.intel.com/content/www/us/en/docs/programmable/683375/current/configuration-sequence.html


Regards,

Aiman


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NurAiman_M_Intel
Employee
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We do not receive any response from you to the previous answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you


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