onchip mem is full on a "Hello world" program

[Altera_Forum]

Hello, 

 I am working on a video design with the Cyclone III C25 starter kit and a hsmc quad video Bitec card.  I have a sopc design with a cpu, onchip mem, a ssram, a flash memory interface, a tristate bridge, a jtag, an i2c bus (BITEC module), a vga and 2 video inputs (those are also BITEC modules). It was extracted from an example which worked. Until now, I never changed anything in SoPC. Lately, I made a test and generated sopc again without changing anything. Then, I have the following errors in NIOS (I did not change my C code either). I have 32KBytes onchip mem with 32 bit wide data (on a C25 board, I have a total memory of 0.6Mbits thus my total onchip mem is 600/8 = 75 MBytes) ? I made another test and implemented an easy "Hello world" which does not work either. The section .text corresponds to my program, which may be too big ? Thus, it should work at least on a "hello world" program ?   Myriam   Here is what is written in NIOS II :  make -s all includes  Compiling main4.c... Linking hsmc_quad_video_mosaic.elf... /cygdrive/c/altera/90/nios2eds/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.6/../../../../nios2-elf/bin/ld: region onchip_mem is full (hsmc_quad_video_mosaic.elf section .text). Region needs to be 20832 bytes larger. /cygdrive/c/altera/90/nios2eds/bin/nios2-gnutools/H-i686-pc-cygwin/bin/../lib/gcc/nios2-elf/3.4.6/../../../../nios2-elf/bin/ld: address 0x1fd54 of hsmc_quad_video_mosaic.elf section .onchip_mem is not within region onchip_mem collect2: ld returned 1 exit status make: *** [hsmc_quad_video_mosaic.elf] Error 1 Build completed in 6.828 seconds

[Altera_Forum]

Not sure what your question is. Onchip memory is very limited. Most nios designs do not run their code out of onchip memory. You can only do this for a very small design. I recommend that you run your code out of the ssram instead. Do you know how to do this? 

 Jake

[Altera_Forum]

In the System Library Properties, in the right column, I only have the program memory on the onchip mem because I have no choice. The other things (read only data memory...stack memory) are on the ssram. Is that what you were saying ? Otherwise, I don't know how to do this.

[Altera_Forum]

Hi Jake,  

 I added a ddr-sdram, put 40kbytes of onchip mem and put the reset and irq vectors of the cpu on the ddr instead of the onchip mem. I still missed 5000 bytes. I tried 45000kbytes of onchip mem but it is too much and Quartus II did not compile.  I chose to run the code on the DDR SDRAM for the program memory and let the rest of the right column to ssram memory. I also tried to put everything on ddr sdram memory. But then, I have :   Build :  Hardware simulation is not enabled for the target SOPC Builder system.  Skipping creation of hardware simulation model contents and simulation symbol files Run as :  Downloading 02000000 ( 0%) Downloaded 48KB in 0.8s (60.0KB/s) Verifying 02000000 ( 0%) Verify failed between address 0x2000000 and 0x200BFEB Leaving target processor paused  What should I do ?  Thanks in advance,  Myriam