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Hi,
we are going to use FPGA EP4CGX50. In your AN 592: Cyclone IV Design Guidelines Device Power-Up topic (page 15) says '' Cyclone IV devices support power up or power down of the VCCINT, VCCA, and VCCIO pins in any sequence''. We are going to use the dual buck converter ADP2114ACPZ-R7 outputs (2.5Vand 1.2V) (from analog devices) For powering up the FPGA. In ADP2114 this chip its mentioned as Dual-phase, 180° phase shifted PWM channels. Will this phase affect the FPGA powering up ? Can you specify the importance of the phase shift ? Can you give your suggestion and guidance regarding this ? Awaiting for your reply .Link Copied
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--- Quote Start --- Will this phase affect the FPGA powering up ? --- Quote End --- No. --- Quote Start --- Can you specify the importance of the phase shift ? --- Quote End --- It will signifcantly reduce the input current ripple of the converter. Sufficient bypassing at the input of the switch mode converter and filtering of the output voltages should be provided anyway.

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