Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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problem with NIOS II

Altera_Forum
Honored Contributor II
‎03-07-2013 09:46 PM
1,272 Views

Hi, 

I started to use NIOS II IDE trying to make rthernet communication between a pc and DE2 board.i started by trying some examples existing in the NIOS II system but while runnig i got the following errors: 

 

ID value does not match: read 0xFFFFFFFF; expected 0x4AD93D43 

 

Timestamp value does not match: image on board is older than expected 

 

Read timestamp 0:59:59 1970/01/01; expected 8:05:12 2009/02/26 

 

The software you are downloading may not run on the system which is currently 

 

configured into the device. Please download the correct SOF or recompile. 

 

Leaving target processor paused 

 

i'm using Altera complete design v9. 

Thanks for any answers to my question. 

best, 

mira 

 

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Altera_Forum
Honored Contributor II
‎03-08-2013 07:52 AM
555 Views

The sof file you loaded is not the correct one, or it is not up to date. 

Re-generate the sopc system, then rebuild both the Quartus and Nios projects.
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Altera_Forum
Honored Contributor II
‎03-08-2013 08:28 AM
555 Views

thanks Cris72 for reply. 

i found also a problem while compilation,i got this error: 

Error(10003):can't open encrypted VHDL or Verilog HDL file.what can this error refer to?
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