rise time measurement for refclk input

[Altera_Forum]

This is a board designer question - please help if you know the answer. 

Stratix V datasheet specifies max rise time for transceiver refclk as 250ps.  The clock is differential It also specifies min-max peak to peak for the refclk as 200mV to 1600mV.  My question: Let us say the input I give to this pin on my board has peak-to-peak = 1600mV Let us say I measure the rise time from -800mV to +800mv as 500ps. Does this fail the above spec?  My argument is that it does not - because the input does not need 1600mV to see the transition, it needs only 200mV Therefore, I need to measure the rise time of only that part of my waveform that swings from -100mV to 100mV. If the rise time measured from -100mV to 100mV is <250ps, I would say I passed the spec!  Please help if you know the answer.  Thanks, Krishna

[Altera_Forum]

I does not have specific answer to your question but just to share my thought. Since the rise time is out from the datasheet specification, if you are not able to reduce the rise time, then you might need to perform thorough hardware tests to ensure the transceiver can function as your expectation.